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low power, unity gain , fully differential amplifier and adc d river data sheet ad8476 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2011 C 2012 analog devices, inc. all rights reserved. features very low power 33 0 a supply current extremely low harmonic distortion ?126 hd2 at 10 khz ?128 hd3 at 10 khz fully differential or single - ended input s /output s differential output designed to drive precision adcs drives switched capacitor and - adcs rail - to - rail output s vocm pin adjusts output common mode robust o vervoltage up to 18 v beyond supplies high performance suitable for driving 16 - bit converter up to 250 ksps 39 nv/hz output noise 1 ppm/c gain drift maximum 2 00 v maximum output of fset 1 0 v/s slew rate 6 mhz bandwidth single supply: 3 v to 18 v dual supplies: 1.5 v to 9 v applications adc driver differential instrumentation amplifier building block single - ended - to - differential converter battery - powered instruments functional block diagram 10k? 10k? 10k? 10k? inn 1 +v s 2 vocm 3 +out 4 inp 8 ?v s 7 nc 6 ?out 5 notes 1. nc = no connect. do not connect to this pin. 10195-001 ad8476 figure 1. 8 - lead msop 12 11 10 1 3 4 nc ?out +out 9 vocm in p inn 2 in p inn 6 +v s 5 +v s 7 +v s 8 +v s 16 ?v s 15 ?v s 14 ?v s 13 ?v s 10k? 10k? 10k? 10k? ad8476 notes 1. nc = no connec t . do not connect t o this pin. 10195-002 figure 2 . 16 - lead lfcsp general description the ad8476 is a very low power, fully differential precision amplifier wi th integrated gain resistors for unity gain . it is an ideal choice for driving low power, high performance adcs as a single- ended - to - differential or differential - to - differential amplifier. it provides a precisi on gain of 1, common - mode level shifting, low temperature drift, and rail - to - rail outputs for maximum dynamic range . the ad8476 also provides overvoltage protection from large industrial input voltages up to 23 v while operating on a dual 5 v supply. powe r dissipation on a single 5 v supply is only 1.5 m w. the ad8476 works well with sar, - , and pipeline converters. the high current output stage of the part allows it t o drive the switched capacitor front - end circuits of many adcs with minimal error . un like many differential drivers o n the market, the ad8476 is a high precision amplifier. with 2 00 v maximum output offset, 39 nv/hz noise, and ?1 02 db thd + n at 10 khz , the ad8476 pairs well with low power, high accuracy converters. considering its lo w power consumption and high precision, the slew- enhanced ad8476 has excellent speed, settling to 1 6- bit precision for 250 k sps acquisition times . the ad8476 is availab le in space - saving 16 - lead, 3 mm 3 mm lfcsp and 8 - lead msop packages. it is fully specified over the ?40c to +125c temperature range.
ad8476 data sheet rev. b | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 thermal resistance ...................................................................... 5 maximum power dissipation ..................................................... 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 8 terminology .................................................................................... 16 theory of operation ...................................................................... 17 overview ..................................................................................... 17 circuit information .................................................................... 17 dc precision ............................................................................... 17 input voltage range ................................................................... 18 driving the ad8476 ................................................................... 18 power supplies ............................................................................ 18 applications information .............................................................. 19 typical configuration ................................................................ 19 single - ended - to - differential convers ion ............................... 19 setting the output common - mode voltage .......................... 19 low power adc driving .......................................................... 20 outline dimensions ....................................................................... 21 ordering guide .......................................................................... 22 revision history 5/12 rev. a to rev. b added lfcsp throughout .............................................................. 1 added harmonic distortion values to features section and changed bandwidth from 5 mhz to 6 mhz ................................ 1 changed ?3 db small signal bandwidth from 5 mhz to 6 mhz, changed hd2 from ?120 db to ?126 db, and changed hd3 from ?122 db to ?128 db, table 1 .................................................. 3 changes to figure 17 and figure 19 ............................................. 10 changes to figure 25 ...................................................................... 11 changes to figure 30 ................................ ...................................... 12 added low power adc driving se ction ................................... 20 updated outline dimensions ....................................................... 21 changes to ordering guide .......................................................... 22 11/11 rev. 0 to rev. a changes to table 1 ............................................................................ 3 changes to typical performance characteristics ......................... 7 added figure 39; renumbered sequentially .............................. 13 added table 5 .................................................................................. 18 removed low power adc driving s ect ion ............................... 19 removed figure 5 2 ......................................................................... 19 10/11 rev ision 0: initial version
data sheet ad8476 rev. b | page 3 of 24 specifications v s = +5 to 5 v, vocm = midsupply , v out = v +out ? v ?out , r l = 2 k ? differential , referred to output (rto) , t a = 25c , unless otherwise noted. table 1 . parameter test conditions/comments b grade a grade unit min typ max min typ max dynam ic performance ?3 db small s ignal bandwidth v out = 200 mv p -p 6 6 mhz ?3 db large signal bandwidth v out = 2 v p -p 1 1 mhz slew rate v out = 2 v step 10 10 v/s settling time to 0.01% v out = 2 v step 1.0 1.0 s settling time to 0.001% v out = 2 v step 1.6 1.6 s noise/distortion 1 thd + n f = 10 khz, v out = 2 v p - p, 22 khz filter ?1 02 ?1 02 db hd2 f = 10 khz, v out = 2 v p -p ?126 ?126 db hd3 f = 10 khz, v out = 2 v p -p ?128 ?128 db imd3 f 1 = 95 khz, f 2 = 105 khz, v out = 2 v p -p ?82 ?82 d bc output voltage noise f = 0.1 hz to 10 hz 6 6 v p -p spectral noise density f = 10 khz 39 39 nv/hz gain 1 1 v/v gain error r l = 0.02 0.04 % gain drift ?40c t a +125c 1 1 ppm/c gain nonlinearity v out = 4 v p -p 5 5 p pm offset and cmrr differential offset 2 50 200 50 5 00 v vs. temperature ?40c t a +125c 900 900 v average tc ?40c t a +125c 1 4 1 4 v/c vs. power supply (psrr) v s = 2.5 v to 9 v 90 90 db common - mode offset 2 50 50 v common - mode rejection ratio v in,cm = 5 v 90 80 db input characteristics input voltage range 3 differential input ?v s + 0.05 +v s ? 0.05 ?v s + 0.05 +v s ? 0.05 v single - ended input 2(?v s + 0.05) 2(+v ? 0.05) 2(?v s + 0.05) 2(+v s ? 0.05) v impedance 4 v cm = v s /2 single - ended input 13.3 13.3 k? differential input 20 20 k? common - mode input 10 10 k? output characteristics output swing v s = +5 v ?v s + 0. 12 5 +v s ? 0. 14 ?v s + 0.12 5 +v s ? 0. 14 v s = 5 v ?v s + 0. 155 +v s ? 0.18 ?v s + 0. 155 +v s ? 0.18 output balance error ?v out,cm /?v out,dm 90 80 db output impedance 0.1 0.1 ? capacitive load per output 20 20 pf short- circuit current limit 35 35 ma vocm ch aracteristics vocm input voltage range ?v s + 1 +v s ? 1 ?v s + 1 +v s ? 1 v vocm input impedance 500 500 k ? vocm gain error 0.05 0.05 %
ad8476 data sheet rev. b | page 4 of 24 parameter test conditions/comments b grade a grade unit min typ max min typ max power supply specified supply voltage 5 5 v operating supply voltage range 3 18 3 18 v supply current v s = + 5 v, t a = 25c 3 00 3 30 3 00 3 30 a v s = 5 v, t a = 25c 330 380 330 380 a over temperature ?40c t a +125c 400 500 400 500 a temperature range specified performance range ?40 +125 ?40 +125 c 1 includes amplifier voltage and current noise, as well as noise of internal resistors. 2 includes input bias and offset current errors. 3 the input voltage ran ge is a function of the voltage supplies and esd diodes. 4 internal resistors are trimmed to be ratio matched but have 20% absolute accuracy.
data sheet ad8476 rev. b | page 5 of 24 a bsolute maximum rati ngs table 2 . parameter rating supply voltage 10 v maximum v oltage at any input p in + v s + 18 v minimum voltage at any input pin ?v s C 18 v storage temperature range ? 65c to +15 0c specified temperature ra nge ?40c to + 125c package glass transition temperature (t g ) 150c esd (h uman body model ) 2500 v stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal resistance the ja values in table 3 assume a 4 - layer jedec standard board with zero airflow. table 3 . thermal resistance package type ja unit 8- lead msop 209.0 c/w 16 - lead lfcsp, 3 mm 3 mm 78.5 c/w maximum power dissipation the maximum safe power dissipation for the ad8476 is limited by the associated rise in junction temperature (t j ) on the die. at approximately 15 0 c, which is the glass transition temperature, the properties of the plastic change . even temporarily excee d ing this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric perfor m ance of the amplifiers. exceeding a temperature of 15 0 c for an extend ed period may result in a loss of fun c tionality. esd caution
ad8476 data sheet rev. b | page 6 of 24 pin configuration and function descripti ons inn 1 +v s 2 vocm 3 +out 4 in p 8 ?v s 7 nc 6 ?out 5 ad8476 top view (not to scale) 10195-004 notes 1. pins labeled nc can be allowed to float, but it is better to connect these pins to ground. avoid routing high speed signals through these pins because noise coupling may result. figure 3. 8 - lead msop pin configuration table 4 . 8 - lead msop pin function descriptions pin no. mnemonic description 1 inn negative input . 2 +v s positive supply. 3 vocm output common - mode adjust. 4 +out noninverting output. 5 ?out inverting output. 6 nc this pin is not connected internally (see figure 3 ). 7 ?v s negative supply. 8 inp positive input.
data sheet ad8476 rev. b | page 7 of 24 12 11 10 1 3 4 nc ?out +out 9 vocm in p inn 2 in p inn 6 +v s 5 +v s 7 +v s 8 +v s 16 ?v s 15 ?v s 14 ?v s 13 ?v s ad8476 top view (not to scale) 10195-003 notes 1. pins labeled nc can be allowed to float, but it is better to connect these pins to ground. avoid routing high speed signals through these pins because noise coupling may result. 2. solder the exposed paddle on the back of the package to a ground plane. figure 4 . 16 - lead lfcsp pin configuration table 5 . 16 - lead lfcsp pin function descriptions pin o. mnemonic description 1 inp positive input. 2 inp positive input. 3 inn negative input. 4 inn negative input . 5 +v s positive supply. 6 +v s positive supply. 7 +v s positive supply. 8 +v s positive supply. 9 vocm output common - mode adjust. 10 +out noninverting output. 11 ?out inverting output. 12 nc this pin is not connected internally (see figure 4 ). 13 ?v s negative supply. 14 ?v s negative supply. 15 ?v s negative supply. 16 ?v s negative supply. epad solder the exposed paddle on the back of the package to a ground plane.
ad8476 data sheet rev. b | page 8 of 24 typical performance characteristics v s = +5 v, g = 1, vocm connected to 2.5 v , r l = 2 k? differentially , t a = 25c, referred to output (rto) , unless otherwise noted. 50 ?50 ?40 ?30 ?20 ?10 0 10 20 30 40 ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 cmrr (v/v) temperature (c) 10195-005 normalized to 25c figure 5. cmrr vs. tempera ture ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 offset voltage (v) temperature (c) 10195-006 ?1500 ?1300 ?1100 ?900 ?700 ?500 ?300 ?100 100 300 500 700 900 1100 1300 1500 normalized to 25c figure 6. system offset temperature drift ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 gain error (v/v) temperature (c) 10195-007 ?150 ?100 ?50 0 50 100 150 normalized to 25c figure 7. gain error vs . temperature 15 ?15 ?10 ?5 0 5 10 ?15 ?10 ?5 0 5 10 15 common-mode voltage (v) output voltage (v) 10195-008 v s = 5v v s = 2.5v figure 8. input common - mode voltage vs. output voltage, v s = 5 v and 2.5 v 1 15 65 70 75 80 85 90 95 100 105 1 10 10 100 1k 10k 100k 1m cmrr (db) frequenc y (hz) v s = 5v v s = +5v 10195-010 figure 9. common - mode rejection vs. frequency ?20 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 100 1k 10k 100k 1m 10m psrr (db) frequency (hz) 10195-011 v s = 5v v s = +5v figure 10 . power supply rejection vs . frequency
data sheet ad8476 rev. b | page 9 of 24 20 18 16 14 12 10 8 6 4 2 0 100 1k 10k 100k 10m 1m maximum output voltage (v p-p) frequency (hz) 2k load no load 10195-012 figure 11 . maximum output voltage vs . frequency 1k 10k 100k 1m output voltage swing (v) referred to supply voltages r load () 10195-013 ?55c ?40c +25c +85c +125c +v s 0.050 0.025 0. 075 0.100 0.125 ?v s 0.025 0.050 0.075 0.100 0.125 0.150 0.175 0.150 0.175 figure 12 . output voltage swing vs. r l oad vs. temp erature , v s = 5 v ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 slew rate (v/s) temperature (c) 10195-015 15 5 6 7 8 9 10 11 12 13 14 rise fall figure 13 . slew rate vs. temperature ?40 ?25 ?10 5 20 35 50 65 80 95 110 125 current (ma) temperature (c) 10195-016 50 5 10 15 20 25 30 35 40 45 v s = 5v v s = 2.5v figure 14 . short - circuit current vs. temperature 10a 100a 1ma 10ma output voltage swing (v) referred to supply voltages current (a) 10195-014 +v s 0.050 0.025 0.075 0.100 0.125 ?v s 0.025 0.050 0.075 0.100 0.125 0.150 0.175 0.150 0.175 +125c +85c +25c ?40c ?55c figure 15 . ou tput voltage swing vs. load current vs. temperature, v s = 5 v 2v/div 2s/div 10195-051 v in v out figure 16 . overdrive recovery , v s = +5 v
ad8476 data sheet rev. b | page 10 of 24 10 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m gain (db) frequenc y (hz) v s = 5v v s = +5v 10195-017 figure 17 . small signal frequency response for various supplies 10 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m gain (db) frequenc y (hz) r l = 10k r l = 2k r l = 200 10195-018 figure 18 . small signal frequency response for various loads 10 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m output magnitude (db) frequency (hz) 10195-019 c l = 5pf c l = 10pf c l = 15pf figure 19 . small signal frequency response for various capacitive loads 10 ?50 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m gain (db) frequenc y (hz) v s = 5v v s = +5v 10195-020 figure 20 . large signal frequency response for various supplies 10 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m output magnitude (db) frequenc y (hz) r l = 10k r l = 2k r l = 200 10195-021 figure 21 . large signal frequency response for various loads 10 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 100 1k 10k 100k 1m 10m output magnitude (db) frequency (hz) 10195-101 c l = 5pf c l = 10pf c l = 15pf figure 22 . large signal frequency response for various capacitive loads
data sheet ad8476 rev. b | page 11 of 24 5 ?25 ?20 ?15 ?10 ?5 0 1k 10k 100k 1m 10m output magnitude (db) frequency (hz) vocm = 1.0v vocm = 2.5v vocm = 4.0v 10195-024 figure 23 . small signal frequency response for various vocm levels 5 ?30 ?25 ?20 ?15 ?10 ?5 0 1k 100k 10k 1m 10m output magnitude (db) vocm input frequency (hz) 10195-056 positive output (2k load) v s = 5v negative output (2k load) figure 24 . vocm small signal frequency response 50mv/div 500ns/div v s = 5v v s = +5v v s = +3v 10195-029 figure 25 . small signal pulse response for various supplies 5 ?35 ?20 ?25 ?30 ?15 ?10 ?5 0 1k 10k 100k 1m 10m output magnitude (db) frequenc y (hz) c l = 5pf c l = 10pf c l = 15pf 10195-027 figure 26 . large signal freque ncy response for various vocm level 5 ?30 ?25 ?20 ?15 ?10 ?5 0 1k 100k 10k 1m output magnitude (db) vocm input frequency (hz) 10195-055 positive output negative output figure 27 . vocm large signal frequency response 500mv/div 500ns/div 10195-032 v s = 5v v s = +5v v s = +3v figure 28 . large signal pulse response for various supplies
ad8476 data sheet rev. b | page 12 of 24 50mv/div 500ns/div r l = 10k r l = 2k r l = 200 10195-031 figure 29 . small signal step response for various resistive loads, v s = 5 v 50mv/div 500ns/div c l = 0pf c l = 5pf c l = 10pf 10195-030 figure 30 . small signal step response for various c apacitive loads , v s = 5 v 20mv/div 500ns/div 10195-035 figure 31 . vocm small signal step response 500mv/div 500ns/div r l = 10k r l = 2k r l = 200 10195-033 figure 32 . large signal step response for various resistive loads , v s = 5 v 500mv/div 500ns/div c l = 0pf c l = 5pf c l = 10pf 10195-034 figure 33 . large signal step respon se for various capacitive loads , v s = 5 v 500mv/div 10s/div 10195-038 figure 34 . vocm large signal step re sponse
data sheet ad8476 rev. b | page 13 of 24 3.0 ?3.0 ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 2.0 2.5 0 100908070605040302010 output voltage (v) time (seconds) 10195-039 figure 35 . 0.1 hz to 10 hz voltage noise ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 100 1k 10k 100k 1m harmonic distortion (dbc) frequency (hz) 10195-040 hd2, r l = no load hd3, r l = no load hd2, r l = 2k load hd3, r l = 2k load figure 36 . harmonic distortion vs . frequency at various loads ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 100 1k 10k 100k 1m harmonic distortion (dbc) frequency (hz) 10195-042 hd2 (v s = 5v, r l = 2k) hd3 (v s = 5v, r l = 2k) hd2 (v s = +5v, r l = 2k) hd3 (v s = +5v, r l = 2k) figure 37 . harmonic distortion vs . frequency at various sup plies 140 130 120 110 100 90 80 70 60 50 40 30 20 1 10 100 1k 10k 100k spectral noise density (nv/ hz) frequency (hz) 10195-036 figure 38 . voltage noise density vs . frequency ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 100 1k 10k 100k 1m harmonic distortion (dbc) frequency (hz) 10195-046 hd2 (v out = 4v p-p) hd3 (v out = 4v p-p) hd2 (v out = 2v p-p) hd3 (v out = 2v p-p) figure 39 . harmonic distortion vs . frequency at various v out,dm ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 0 1 2 3 4 5 6 7 8 9 10 harmonic distortion (dbc) v out (v p-p) 10195-047 hd2, v s = 5v hd3, v s = 5v figure 40 . harmonic distortion vs . v out,dm , f = 10 khz
ad8476 data sheet rev. b | page 14 of 24 ?140 ?130 ?120 ?1 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 100 1k 10k 100k 1m harmonic dis t ortion (dbc) frequenc y (hz) hd2 (single-ended input) hd3 (single-ended input) hd2 (differential input) hd3 (differential input) 10195-139 figure 41 . harmonic distortion vs. input drive ?80 ?120 ?115 ?110 ?105 ?100 ?95 ?90 ?85 10 1k 100 10k 100k thd + n (db) frequency (hz) 10195-053 v out = 2v p-p v out = 4v p-p v out = 8v p-p figure 42 . total harmonic distortion + noise vs. frequency 1s/div 10195-037 1v/div 200v/div 0.01%/div figure 43 . settling time to 0.01% of 2 v step 40 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 20 25 30 35 ?1.0 ?0.8 ?0.6 ?0.4 ?0.2 0 0.2 0.4 0.6 0.8 1.0 error (ppm) output voltage (v) 10195-200 v s = 5v fi gure 44 . gain nonlinearity ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 100 1k 10k 100k 1m spurious-free dynamcic range (dbc) frequency (hz) 10195-049 v s = 5v, r l = 2k v s = 5v, r l = no load figure 45 . s purious - free dynamic range vs. frequency at various loads 2s/div 10195-100 1v/div 20v/div 0.001%/div figure 46 . settling time to 0.001% of 2 v step
data sheet ad8476 rev. b | page 15 of 24 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 100 1k 10k 100k 1m 10m output balance error (db) frequency (hz) 10195-050 figure 47 . output balance error vs. frequency 10 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 80 100 90 110 120 95 85 105 115 normalized spectrum (dbc) frequency (hz) 10195-054 figure 48 . 100 khz intermodulation distortion 1k 100 10 1 0.1 10k 100k 1m 10m impedance () frequency (hz) 10195-052 positive output negative output figure 49 . output impedance vs. frequency
ad8476 data sheet rev. b | page 16 of 24 terminology +in vocm ?in +out ?out v out, dm r l, dm ad8476 10k? 10k? 10k? 10k? 10195-057 figure 50 . sign al and circuit definitions differential voltage differential voltage refers to the difference between two node voltages. for example, the output differential voltage (or equivalently, output differential mode voltage) is defined as v out, dm = ( v +out ? v ?out ) where v +out and v ?out refer to the voltages at the +out and ?out terminals with respect to a common ground reference. similarly, the differential input voltage is defined as v in, dm = ( v + in ? v ? in ) common - mode voltage common - mode voltage refers to the average of two node voltages with respect to the local ground reference. the output common - mode voltage is defined as v out, cm = ( v +out + v ?out )/2 balance output balance is a measure of how close the output differential signals are to being equal i n amplitude and opposite in phase. output balance is most easily determined by placing a well - matched resistor divider between the differential voltage nodes and comparing the magnitude of the signal at the divider midpoint with the magnitude of the differ ential signal . by this definition, output balance is the magnitude of the output common - mode voltage divided by the magnitude of the output differential mode voltage. dm out cm out v v error balance output , , ? ? =
data sheet ad8476 rev. b | page 17 of 24 theory of operation overview the ad8476 is a fully differential amplifier, with integrated laser- trimmed resistors, that provides a precision gain of 1. the internal differential amplifier of the ad8476 differs from conventional operational amplifiers in that it has two outputs whose voltages are equal in magnitude, but move in opposite directions (180 out of phase). the ad8476 is designed to greatly simplify single - ended - to - differenti al conversion, common - mode level shifting and precision driving of differential signals into low power , differential input adcs. the vocm input allows the user to set the output common - mode voltage to match with the input range of the adc. like an operati onal amplifier, the vocm function relies on high open - loop gain and negative feedback to force the output nodes to the desired voltages. 10k? 10k? 10k? 10k? inn 1 +v s 2 vocm 3 +out 4 in p 8 ?v s 7 nc 6 ?out 5 notes 1. nc = no connec t. do not connect t o this pin. 10195-058 ad8476 figure 51 . block diagram circuit information the ad8476 amplifier uses a voltage feedback topology; therefore, the amplifier exhibits a nominally constant gain bandwidth product. like a voltage feedback operational amplifier, the ad8476 also has high input im pedance at its internal input terminals (the summing nodes of the internal amplifier) and low output impedance. the ad8476 employs two feedback loops, one each to control the differential and common - mode output v oltages. the differen - tial feedback loop, which is fixed with precision laser - trimmed on - chip resistors, controls the differential output voltage. output common - mode voltage (vocm) the internal common - mode feedback controls the common - mode output voltage. this architecture makes it easy for the user to set the output common - mode level to any arbitrary value independent of the input voltage. the output common - mode voltage is forced by the internal common - mode feedback loop to be equal to the voltage applied to the vocm input. the vocm pin can be left unconnected, and the output common - mode voltage self - biases to midsupply by the internal feedback control. due to the internal common - mode feedback loop and the fully differential topology of the amplifier, the ad8476 outputs are precisely balanced over a wide frequency range. this means that the amplifiers differential outputs are very close to the ideal of being identical in amplitude and exactly 180 out of phase. d c precision the dc precision of the ad8476 is highly dependent on the accuracy of its integrated gain resistors. using superposition to analyze the circuit shown in figure 52 , the follow ing equation shows the relationship between the input and output voltages of the amplifier: ( ) ( ) ( ) ( ) np dm out np cm out npnp dm in np cmin rr vrrv rrrrvrrv ++ +? = ++ +? 2 2 1 2 2 1 , , , , where: rgp rfp r p = , rgn rfn r n = np dm in vvv ?= , )( 2 1 , np cmin vv v += the differential closed - loop gain of the amplifier is np npnp dm in dm out rr rrrr v v ++ ++ = 2 2 , , and the common rejection of the amplifier is ( ) np np cmin dm out rr rr v v ++ ? = 2 2 , , rf p rfn rg p rgn v on v op vocm v p v n 10195-059 figure 52 . functional circuit diagram of the ad8476 at a given gain the pr eceding equations show that the gain accuracy and the common - mode rejection (cmrr) of the ad8476 are deter - mined primarily by the matching of the feedback networks (resistor ratios). if the two networks are perfe ctly matched, that is, if r p and r n equal rf/rg , then the resistor network does not generate any cmrr errors and the differential closed loop gain of the amplifier reduces to rg rf v v dm in dm out = , ,
ad8476 data sheet rev. b | page 18 of 24 the ad8476 i ntegrated resistors are precision wafer -laser- trimmed to guarantee a minimum cmrr of 90 db ( 32 v/v), and gain error of less that 0.0 2 %. to achieve equivalent precision and performance using a discrete solution, resistors must be matched to 0.01% or better. input voltage range the ad8476 can measure input v oltages as large as the supply rails. the internal gain and feedback resistors form a divider, which reduces the input voltage seen by the internal input nodes of the amplifier. the largest voltage that can be measured properly is constrained by the outpu t range of the amplifier and the capability of the amplifiers internal summing nodes. this voltage is defined by the input voltage , and the ratio between the feedback and the gain resistors. figure 53 shows the voltage at the i nternal summing nodes of the amplifier, defined by the input voltage and internal resistor network. if v n is grounded, the expression shown reduces to ? ? ? ? ? ? + + == p minus plus v rg rf vocm rgrf rg vv 2 1 the internal amplifier of the ad8476 has rail - to - rail inputs. to obtain accurate measurements with minimal distortion, the voltage at the internal inputs of the amplifier must stay below +v s ? 1 v and above ?v s . the ad8476 provides overvoltage protection for excessive input voltages beyond the supply rails. integrated esd protection diodes at the inputs prevent damage to the ad8476 up to +v s + 18 v and ?v s ? 1 8 v. driving the ad8476 care should be taken to drive the ad8476 with a low impedance source: for example, another amplifier. source resistance can unbalanc e the resistor ratios and, therefore, significantly degrade the gain accuracy and common - mode rejection of the ad8476 . for the best performance, source impedance to the ad8476 input terminals should be kept belo w 0.1 . refer to the dc precision section for details on the critical role of resistor ratios in the precision of the ad8476 . power supplies the ad8476 operates over a wide range of supply voltages. it can be powered on a single supply as low as 3 v and as high as 18 v . the ad8476 can also operate on dual supplies from 1.5 v to 9 v a stable dc voltag e should be used to power the ad8476 . note that noise on the supply pins can adversely affect performance. for more information, see the psrr performance curve in figure 10 . place a byp ass capacitor of 0.1 f between each supply pin and ground, as close as possible to each supply pin. use a tantalum capacitor of 10 f between each supply and ground. it can be farther away from the supply pins and, typically, it can be shared by other pre cision integrated circuits. rf rf rg rg v on v op vocm v p v n v n rf + rg rf v p ? v n rg rf vocm rf + rg rg + + 2 1 10195-060 figure 53 . voltages a t the internal op amp inputs of the ad8476
data sheet ad8476 rev. b | page 19 of 24 applications informa tion typical configuratio n the ad8476 is designed to facilitate single - ended - to - differential conversion, common - mode level shifting, and precision processing of signals so that they are compatible with low voltage adcs. figure 54 shows a typical con nection diagram of the ad8476 . single - ended - to - differential convers ion many industrial systems have single - ended inputs from input sensors ; however, the signals are frequently processed by high performance differ ential input adcs for higher precision. the ad8476 performs the critical function of precisely converting single- ended signals to the differential inputs of precision adcs, and it does so with no need for externa l components. to convert a single - ended signal to a differential signal, connect one input to the signal source and the other input to ground (see figure 54 ). note that either input can be driven by the source with the only effec t being that the outputs have reversed polarity. the ad8476 also accepts truly differential input signals in precision systems with differential signal paths. setting the output c ommon- mode voltage the vocm pin o f the ad8476 is internally biased by a precision voltage divider comprising of two 1 m ? resistors between the supplies. this divider level shifts the output to midsupply. relying on the internal bias results in a n output common - mode voltage that is within 0.05 % of the expected value. 10195-102 10k? 10k? 10k? 10k? inn 1 +v s 2 vocm 3 +out 4 in p 8 ?v s 7 nc 6 ?out 5 ad8476 load input signa l source +5v ?v out +v out + 10f 0.1f + 10f 0.1f ?5v figure 54 . typical configuration 8- lead msop in cases where control of the output common - mode level is desired, an external source or resistor divider can be used to drive the vocm pin . if driven directly from a source, or with a resistor div ider of unequal resistor values , the resistance seen by the vocm pin should be less than 1 k ?. if an external voltage divider consisting of equal resistor values is used to set vocm to midsupply, higher values can be used because the external resistors are placed in parallel with the internal resistors. the output common - mode offset listed in the specifications section assumes that the vocm input is driven by a low impedance voltage source. because of the internal divider, the vocm pin sources and sinks current, depending on the externally applied voltage and its associa ted source resistance. it is also possible to connect the vocm in put to the common - mode level output of an adc; however, care must be taken to ensure that the output has sufficient drive capability. the input impedance of the vocm pin is 5 00 k?. if multipl e ad8476 devices share one adc reference output, a buffer may be neces - sary to drive the parallel inputs. table 6 . differential input adcs 1 adc resolution throughput rate power dissipation ad7674 16 bits 100 ksps 25 mw ad7684 16 bits 100 ksps 6 mw ad7687 16 bits 250 ksps 12.5 mw ad7688 16 bits 500 ksps* 21.5 mw 1 depending on measurement/application type, check that the ad8476 meets settling time requirements.
ad8476 data sheet rev. b | page 20 of 24 low power adc driving the ad8476 is designed to be a low power driver for adcs with up to 16-bit precision and sampling rates of up to 250 ksps. the circuit in figure 56 shows the ad8476 driving the ad7687 , a 16-bit, 250 ksps fully differential sar adc. the filter between the ad8476 and the adc reduces high frequency noise and reduces switching transients from the sampling of the adc. choose the values of this filter with care. optimal values for the filter may need to be determined empirically, but the guidelines discussed herein are provided to help the user. for optimum performance, this filter should be fast enough to settle full-scale to 0.5 lsb of the adc within the acquisition time specified in the adc data sheet, in this case, the ad7687 . if the filter is slower than the acquisition time, distortion can result that looks like harmonics. if the filter is too fast, the noise bandwidth of the amplifier increases, thereby reducing the snr of your system. additional considerations help determine the values of the individual components. thd of the adc is likely to increase with source resistance. this is stated in the adc data sheet. to reduce this effect, try to use smaller resistance and larger capacitance. large capacitance values much greater than 2 nf are hard for the amplifier to drive. higher capacitance also increases the effect of changes in output impedance. it is also important to consider the signal frequency range of interest. the ad8476 thd decreases with higher frequency (see figure 42) and output impedance increases with higher frequency (see figure 49). this higher output impedance yields slower settling, thus be certain to choose your capacitance so that the filter still meets the settling requirement at the maximum frequency of interest. in the application shown, a 100 resistors and 2.2 nf capacitors at each output were chosen. for driving the ad7687 , this combination yields an snr loss of 2.5 db and good thd performance for a 20 khz fundamental frequency, with an adc throughput rate of 250ksps. the filter bandwidth can be determined by the following equation: rc frequency filter ? 2 1 ? 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 ?180 ?170 ?160 ?150 0 20406080100120140 adc full scale (db) frequency (khz) 10195-064 v in = 8v p-p thd = ?112db snr = 93db figure 55. fft of ad8476 driving the ad7687 10195-063 ad8476 ad7687 ?out +out +in ?in vocm ?v s +v s +5v vdd in? in+ +2.5v +1.8v to +5v +5v ref gnd vio sdi sck sdo cnv 100 ? 100 ? 2.2nf 2.2nf +4.5v +2.5v +0.5v 4v + 4 v + 2 v 0v 4v + 4 v + 2 v 0v 4v +4.5 v +2.5v +0.5v 4v figure 56. ad8476 conditioning and level shifting a differential voltage to drive single-supply adc
data sheet ad8476 rev. b | page 21 of 24 outline dimensions compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b figure 57 . 8- lead mini small outline package [msop] (rm -8) dimensions shown in millimeters 3.10 3.00 sq 2.90 0.27 0 .20 0 .15 1.75 1.60 sq 1.45 01-28-2010-b 1 0.50 bs c bottom view top view 16 5 8 9 12 13 4 exposed pad pin 1 indicator 0.50 0 .40 0.30 seating plane 0.05 max 0.02 nom 0.20 ref 0.20 min coplanarity 0.08 pin 1 indicator for proper connectio n of the exposed pad, refer to the pin configuration and f unction descriptions section of this data she et. 0.80 0.75 0.70 compliant to jedec standa rds m o-229-weee. figure 58 . 16 - lead lead frame chip scale package [lfcsp_wq ] 3 mm 3 mm body, very very thin quad (cp - 16 - 25) dimensions shown in millimeters
ad8476 data sheet rev. b | page 22 of 24 ordering guide model 1 temperature range package description package option branding ad8476bcpz -r7 ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y45 ad8476bcpz -rl ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y45 ad8476bcpz - wp ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y45 ad8476acpz -r7 ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y44 ad8476acpz -rl ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y44 ad8476acpz - wp ?40c to +125c 16- lead lead frame chip scale package [lfcsp_wq] cp -16-25 y44 ad8476brmz ?40c to +125c 8- lead mi ni small outline package [msop] rm -8 y47 ad8476brmz -r7 ?40c to +125c 8- lead mini small outline package [msop] rm -8 y47 ad8476brmz -rl ?40c to +125c 8- lead mini small outline package [msop] rm -8 y47 ad8476armz ?40c to +125c 8- lead mini small outline package [msop] rm -8 y46 ad8476armz -r7 ?40c to + 125c 8- lead mini small outline package [msop] rm -8 y46 ad8476armz -rl ?40c to + 125c 8- lead mini small outline package [msop] rm -8 y46 ad8476 - evalz evaluation board 1 z = rohs compliant part.
data sheet ad8476 rev. b | page 23 of 24 notes
ad8476 data sheet rev. b | page 24 of 24 notes ? 2011 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10195 -0- 5/12(b)

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